In general, a semiconductor package includes a semiconductor die, a plurality of leads electrically connected to the semiconductor die and an encapsulant encapsulating the semiconductor die and the leads. In general, a POP (Package On Package) refers to a technique for vertically stacking packages incorporating at least one semiconductor die. Since the packages are individually tested and only tested packages may be stacked, the POP is advantageous in view of assembling yield.
However, in the conventional POP, since a relatively thick printed circuit board (PCB) is typically used as a substrate and a solder ball having a relatively large diameter is used as an internal conductor, the overall thickness of the POP is approximately 1 mm or greater. In addition, a circuit pattern formed on the substrate has a width of approximately 10 μm or greater.
The PCB includes a variety of organic materials, and the coefficient of the thermal expansion of the organic material may be significantly different from that of an inorganic material, such as the semiconductor die or an encapsulant, a considerably severe warping phenomenon may occur to the completed POP.
Additionally, in order to fabricate a POP, the costly PCB must be purchased, increasing the manufacturing cost of the POP.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present disclosure as set forth in the remainder of the present application with reference to the drawings.